The present invention relates generally to transmission line drivers, and specifically to line drivers for data transceivers.
Digital Subscriber Line (DSL) systems are commonly used as one of the methods of transmitting data when there is a wired connection, such as a twisted wired pair, between a transmitter and a receiver. Modems which operate in an Asymmetric DSL (ADSL) mode typically use a multitone signaling technique known as discrete multitone (DMT) signaling, and a DMT signal may be considered to be composed of a large number of sinusoidal signals. Each sinusoidal signal has a relatively small varying amplitude and phase, but the DMT signal which is the sum of the sinusoidal signals typically has a large dynamic range. In other words, even though the average signal voltage amplitude is low, the DMT signal contains high and infrequent voltage peaks. To avoid signal distortion, the peaks must be transmitted and received accurately.
Typical ADSL modems utilize a relatively high voltage power supply in order to transmit the DMT signal without distortion. Accordingly, line drivers of typical modems use power inefficiently, since most of the time the signal being sent has a low voltage amplitude. The resultant low efficiency of the line drivers means that the power consumed is large. Thus, when many modems must be deployed in a single location, as is the case, for example, in the central office of a regional telephone company, the heat generated because of the low modem efficiency limits the number of modems that can be installed in a given space.
For efficient operation, all modems need to have good impedance matching at the output of the modem. Typically, a resistor in series with the output of an operational amplifier, which acts as a line driver signal amplifier, is used to define the output impedance, which is set equal to the load impedance to achieve good impedance matching. In this situation the resistor dissipates half the power delivered by the amplifier, and the load only receives half of the amplifier""s voltage output.
Methods are known in the art to decrease the power consumption of line drivers for signals with a high dynamic range. In an article entitled xe2x80x9cLine Driver Economically Synthesizes Impedance,xe2x80x9d by Koren, in the Jan. 6, 1994, issue of Electronic Design News, which is incorporated herein by reference, there is a description of a method of synthesizing the output impedance so as to reduce the value of the resistor in series with the output of an operational amplifier. The method utilizes two feedback loops, both using resistors. In order for the driver to work correctly, all resistors in the system must have very close tolerances and must be carefully matched.
European Patent Application EP 0901221A1, to Dobbelaere et al., describes a differential output amplifier system for coupling a balanced two-operational amplifier system to a load. The system comprises two feedback loops for each of the amplifiers of the system, the loops measuring signals across a series resistor between the output of each amplifier and the load. The system measures differences in the two feedback loops. The system synthesizes an output impedance using these differences, and the accuracy of the synthesized output falls rapidly as the value of the series resistor is reduced.
It is an object of some aspects of the present invention to provide line driver apparatus having reduced power consumption.
It is a further object of some aspects of the present invention to provide line driver apparatus having a synthesized output impedance that is relatively insensitive to variations in values of components of the apparatus and can thus be produced using low-cost components.
It is a yet further object of some aspects of the present invention to provide a line driver hybrid circuit, for use within a modem, which delivers a high amplitude received signal to the modem with while providing a high rejection of a transmitted signal.
In some preferred embodiments of the present invention, a line driver for a modem comprises a balanced circuit. The balanced circuit comprises two substantially similar transmit circuits, both referenced to an effective ground, and two substantially similar receive circuits also referenced to the effective ground. Each transmit circuit comprises an operational amplifier coupled to a load and then to a low-value resistor connected in series with the load. The load preferably comprises a complex impedance load magnetically coupled to a line driven by the line driver. A voltage generated on the series resistor is fed back to the amplifier in the respective transmit circuit. One side of the series resistor is connected to the effective ground, so that the feedback voltage from the other side of the resistor is directly referenced to the effective ground. Thus, unlike other line drivers known in the art, no subtraction is necessary to generate the feedback voltage, so that the feedback voltage is relatively insensitive to variation of component values in the circuit.
In preferred embodiments of the present invention, each transmit circuit comprises two feedback branches to the respective operational amplifier, one responding to the current and the other responding to the voltage in the transmit circuit. Each receive circuit comprises its own operational amplifier having a balancing network to match the line impedance. By matching the line impedance, the balancing network achieves high rejection at the receive circuits of signals transmitted by the transmit circuits.
Values of components within preferred embodiments of the present invention can be set so as to achieve:
High signal rejection from a transmit port to a receive port;
Negligible voltage loss from an operational amplifier output to a line driver circuit output;
Synthesis of a predefined output gain; and
High received signal voltage gain.
As a consequence, modems constructed in accordance with such preferred embodiments can be made to operate with optimal efficiency.
There is therefore provided, according to a preferred embodiment of the present invention, a line driver for coupling a data transceiver to a line, including:
a first amplifier having a first input and a second input and a first output coupled to a first side of the line, the first input being coupled to a first input terminal;
a second amplifier having a third input and a fourth input and a second output coupled to a second side of the line, the third input being coupled to a second input terminal;
a first voltage feedback resistor, having a first voltage feedback resistance, connected between the first output and the second input;
a second voltage feedback resistor, having a resistance substantially equal to the first voltage feedback resistance, connected between the second output and the fourth input;
a series resistor, having a series resistance, and having a first side coupled to the first output and a second side coupled to the second output;
a gain resistor having a first side connected to the second input and a second side connected to the fourth input;
a first current feedback resistor, having a current feedback resistance, connected between the first side of the gain resistor and the first side of the series resistor; and
a second current feedback resistor, having a resistance substantially equal to the current feedback resistance, connected between the second side of the gain resistor and the second side of the series resistor.
Preferably, the line driver includes
a transformer, including:
a first primary coil connected between the first output and the first side of the series resistor;
a second primary coil connected between the second output and the second side of the series resistor; and
a secondary coil connected between the first side and the second side of the line.
Further preferably, the line driver includes:
a receive circuit, including:
a third amplifier having a fifth input and a sixth input and a third output coupled to a first output terminal;
a fourth amplifier having a seventh input and an eighth input coupled to the sixth input and a fourth output coupled to a second output terminal;
a third voltage feedback resistor, having a second voltage feedback resistance, connected between the third output and the fifth input;
a fourth voltage feedback resistor, having a resistance substantially equal to the second voltage feedback resistance, connected between the fourth output and the seventh input;
a first receive impedance, having a receive reactance, connected between the fifth input and the first side of the series resistor;
a second receive impedance, having a reactance substantially equal to the receive reactance, connected between the seventh input and the second side of the series resistor;
a first balancing impedance, having a balancing reactance, connected between the fifth input and the second output; and
a second balancing impedance, having a reactance substantially equal to the balancing reactance, connected between the seventh input and the first output.
Preferably, a value Zbal of the balancing reactance is substantially equal to a value of an expression                     Z        1            ·              R                  r          ⁢                      xe2x80x83                    ⁢          x                            R      s        ,
wherein
Zl is substantially equal to a value of a load impedance of the line driver,
Rrx is substantially equal to the receive reactance, and
Rs is substantially equal to half the series resistance.
Further preferably, an output voltage at the third output is substantially equal to a value of an expression             2      ·              V        s            ·              R                  x          ⁢                      xe2x80x83                    ⁢          g          ⁢                      xe2x80x83                    ⁢          a          ⁢                      xe2x80x83                    ⁢          i          ⁢                      xe2x80x83                    ⁢          n                    ·              R        s                            R                  s          ⁢                      xe2x80x83                    ⁢          y          ⁢                      xe2x80x83                    ⁢          n                    ·              R                  r          ⁢                      xe2x80x83                    ⁢          x                      ,
wherein
Rsyn is substantially equal to a value of an output impedance of the first amplifier,
Rs is substantially equal to half the series resistance,
Rxgain is substantially equal to the second voltage feedback resistance,
Rrx is substantially equal to the receive reactance, and
Vs is substantially equal to a driving voltage between the first output and the first side of the series resistance.
Preferably, the first balancing impedance includes a first balancing resistor, and the second balancing impedance includes a second balancing resistor.
Further preferably, the first balancing impedance includes a first plurality of resistors and a second plurality of capacitors, and the second balancing impedance includes a third plurality of resistors and a fourth plurality of capacitors.
Preferably, an output impedance Zout of the driver is substantially equal to a value of an expression             R      s        ·          (                                    R                          v              ⁢                              xe2x80x83                            ⁢              f                                            R                          c              ⁢                              xe2x80x83                            ⁢              f                                      +        1            )        ,
wherein
Rs is substantially equal to half the series resistance,
Rvf is substantially equal to the voltage feedback resistance, and
Rcf is substantially equal to the current feedback resistance.
There is further provided, according to a preferred embodiment of the present invention, a method for providing a line driver for coupling a data transceiver to a line, inlcuding:
coupling a first amplifier having a first input and a second input and a first output to a first side of the line, the first input being coupled to a first input terminal;
coupling a second amplifier having a third input and a fourth input and a second output to a second side of the line, the third input being coupled to a second input terminal;
connecting a first voltage feedback resistor, having a first voltage feedback resistance, between the first output and the second input;
connecting a second voltage feedback resistor, having a resistance substantially equal to the first voltage feedback resistance, between the second output and the fourth input;
coupling a first side of a series resistor, having a series resistance, to the first output;
coupling a second side of the series resistor to the second output;
connecting a first side of a gain resistor to the second input;
connecting a second side of the gain resistor to the fourth input;
connecting a first current feedback resistor, having a current feedback resistance, between the first side of the gain resistor and the first side of the series resistor; and
connecting a second current feedback resistor, having a resistance substantially equal to the current feedback resistance, between the second side of the gain resistor and the second side of the series resistor.
The present invention will be more fully understood from the following detailed description of the preferred embodiments thereof, taken together with the drawings, in which: